Cpu Tlb Stream Buffers L 1 Cache Stream Allocator

We explore a variation of Jouppi's stream buuers scheme that reduces the memory stall time by prefetching lines on cache misses. In Jouppi's scheme since the stream buuers are oo-chip, a penalty is incurred even when the required line is available in the stream buuers. We propose moving the stream buuers on-chip to reduce this penalty. Also a line that hits in the stream buuer is not moved into the cache immediately unless the data is identiied to exhibit temporal locality. We use a stream buuer allocator that integrates the ltering and stride detection mechanisms used by Palacharla. We present trace driven simulation results for some of the SPEC92 benchmarks that demonstrate the eeectiveness of our scheme. The results show that there are improvements over a normal cache in all cases and for some benchmarks our scheme reduces the number of oo-chip memory fetches.